Huawei Technologies, a Shenzhen-based telecommunication equipment maker, is reportedly planning to make 3 nanometer chips with deep ultraviolet (DUV) lithography machines despite low yields and high costs.
An article published by Tom’s Hardware, an American technology website, reported Tuesday that Huawei and Semiconductor Manufacturing International Corp (SMIC) together plan to produce 3nm chips by using patented self-aligned quadruple patterning (SAQP) lithography methods. The article said that 7nm-class process technology features 36 to 38nm metal pitches while 5nm-class nodes have metal pitches of 30 to 32nm. It said metal pitches for 3nm chips will be about 21 to 24nm.
Metal pitch is the metric to measure the minimum distance between two horizontal interconnects. In 2019, Intel tried to produce a 10nm chip, which had metal pitches of 36nm. But the project failed due to low yields.
The Tom’s Hardware article said the cost of 5nm or 3nm chip production will be high, making it not feasible for commercial devices. It said the chips can be used in supercomputers or military equipment.
The article was widely cited by Taiwanese media on Wednesday.
In March this year, media reports said Naura Technology Group, a Shenzhen-listed firm, started researching SAQP. They said SiCarrier, a Shenzhen-based state-owned-enterprise that works with Huawei, in late 2023 had been granted a patent that involves SAQP.
SiCarrier filed patents for the SAQP technology in September 2021 when Naura was also involved in this project.
The SAQP technique is called a brute-force method as it involves pitch-splitting, or the division of a pattern into two or three parts. The SAQP can be achieved by applying self-aligned double patterning (SADP) twice.
It is unclear when and whether Huawei and SMIC can mass-produce 3nm chips. Some technology columnists said it may take several years for them to achieve this goal. They added that, by the time the two companies succeed, the global markets will be using 1.4nm chips.
5nm processors
On February 6, the Financial Times reported that SMIC has put together new semiconductor production lines in Shanghai to make next-generation smartphone processors as early as this year. It said the company will make 5nm Kirin chips with existing stock of US and Dutch-made equipment. This report was cited by Taiwan’s DigiTimes.
In March, some Taiwanese media said SMIC has set up a research team to push for the production of 3nm chips. But the reports have not yet been confirmed.
As of now, the most advanced Chinese processors are 7nm chips made by SMIC in Shanghai.
In April, Huawei launched its Pura 70 smartphone, which is powered by the company’s Kirin 9010 application processor.
TechInsights found that Kirin 9010 was made with the so-called N+2 process, the same way the Kirin 9000s was produced. Last August, Huawei unveiled Kirin 9000s in its Mate60 Pro phone.
An IT columnist using the pen name RexAA said in an article that Kirin 9010 performs slightly better than Kirin 9000s. Citing the Geekbench benchmark tests, he said Kirin 9010 achieved 4,471 multi-core scores, compared with Kirin 9000s’ 4,206 scores.
He said Kirin 9010’s performance is in between that of iPhone 12’s A14 chip and iPhone 13’s A15 chip, which achieved 4,152 and 4,498 multi-core scores, respectively. He said it has been a great achievement that the company can still make its own 7nm chips after being sanctioned by the US for four years.
However, the US Semiconductor Industry Association (SIA) said the gap between the US and China in terms of advanced chip production will continue to widen.
The SIA said in a report earlier this month that the US is projected to produce 28% of the world’s most advanced processors (smaller than 10nm nodes) while China will be making only 2%. It said Taiwan’s share in the advanced chip markets will fall to 47% in 2032 from 69% in 2022.
It said its study primarily focused on the impact of the United States’ CHIP Act funding and China’s efforts to achieve processor independence.
Read: SMIC to sell Huawei costly, inefficient 5nm chips
Follow Jeff Pao on Twitter at @jeffpao3
They wouldn’t make a patent for 3 nm if it wasn’t commercially viable. Tomshardware.com thinks in conventional ASML logic. There are many other paths to 3nm. The one with multiple patterning seems very rational and I would say probably cost effective with DUV. DUV are way much more reliable than EUV and less complex. I don’t think there will be a Yield issue at all. The only thing is speed. But then again, with more reliable equipment and tweaking they can offset that.
Based on the history of China achievement in the last 40 years, i have confidence that 3nm chip won’t be long. whoever try to compete with China on manufacturing is a suicide mission.
What do you mean it won’t be long? They already have it, they’re just tweaking it for commercial scale use.